Changelog



26th IFIP/IEEE/AICA International Conference
on Very Large Scale Integration
Verona, 8-10 October, Roseo Hotel Leon D'oro.




Conference Theme: “Design and Engineering of Electronics Systems Based on New Computing Paradigms

VLSI-SoC 2018 is the 26th in a series of international conferences sponsored by the International Federation for Information Processing Technical Committee 10 Working Group 5, IEEE CEDA and IEEE CASS, which explore the state-of-the-art in the areas of Very Large Scale Integration (VLSI) and System-on-Chip (SoC) design. The purpose of VLSI-SoC is to provide a forum to exchange ideas and showcase academic as well as industrial research in architectures, circuits, devices, design automation, verification, test, and security, within digital, analog, and mixed-signal systems.

VLSI-SoC 2018 will be held under the theme “Design and engineering of electronics systems based on new computing paradigms” by addressing cutting-edge research fields like heterogeneous, neuromorphic and brain-inspired, biologically-inspired, approximate computing systems. VLSI-SoC 2018 will be held in Verona, Italy. Verona, which has been awarded World Heritage Site status by UNESCO because of its urban structure and architecture, is the set of the Shakespeare’s Romeo and Juliet play, one of the most visited Roman imperial city in Northern Italy, the capital of the opera lyrics with its Arena roman amphitheater, the land of the Amarone della Valpolicella vineyards.


TOPICS

Topics of interest include, but are not limited to:

TRACK 1: Analog, mixed-signal, and sensor architectures
TRACK 2: Digital architectures: NoC, multi- and many-core, hybrid, and reconfigurable
TRACK 3: CAD: Synthesis and analysis
TRACK 4: Prototyping, verification, modeling, and simulation
TRACK 5: Circuits and systems for signal processing and communications
TRACK 6: IoT, embedded and cyberphysical systems: Architecture, design, and software
TRACK 7: Low-power and thermal-aware IC design
TRACK 8: Emerging technologies and computing paradigms
TRACK 9: Variability, reliability, and test
TRACK 10: Hardware security
TRACK 11: Machine learning for SoC design and for electronic design automation

ORGANIZATION COMMITTEE


GENERAL CHAIRS

Graziano Pravadelli (University of Verona, IT)
Todd Austin (University of Michigan, USA)


PROGRAM CHAIRS

Nicola Bombieri (University of Verona, IT)
Masahiro Fujita (University of Tokyo, JP)


SPECIAL SESSION CHAIRS

Sirnivas Katkoori (University of South Florida, USA)
Katell Morin-Allory (TIMA LAboratory, FR)


PHD FORUM CHAIRS

Kiyoung Choi (Seoul National University, KOR)
Sara Vinco (Politecnico di Torino, IT)


INDUSTRIAL CHAIR

Yervant Zorian (Synopsys, USA)


LOCAL CHAIR

Franco Fummi (University of Verona, IT)


PUBLICITY CHAIRS

Ricardo Reis (UFRGS, BR)
Matteo Sonza Reorda (Politecnico di Torino, IT)


PUBBLICATION CHAIRS

Davide Bertozzi (University of Ferrara, IT)
Mahdi Tala (University of Ferrara, IT)


REGISTRATION CHAIR

Michele Lora (Singapore University of Technology and Design, SGP)


STEERING COMMITTEE


STEERING COMMITTEE

Manfred Glesner, TU Darmstadt, Germany
Matthew Guthaus, UC Santa Cruz, USA
Luis Miguel Silveira, INESC ID, Portugal
Fatih Ugurdag, Ozyegin University, Turkey
Salvador Mir, TIMA, France
Ricardo Reis, UFRGS, Brazil
Chi-Ying Tsui, HKUST, Hong Kong, China
Ian O'Connor, INL, France
Masahiro Fujita, The University of Tokyo, Japan





DEADLINES


Regular papers & Special sessions

Extended Abstract registration: April 20, 2018 May 4,2018
Extended Full paper submission: April 27, 2018 May 18,2018
Extended Special session proposal: April 27, 2018 May 18,2018
Extended Notification of acceptance: July 06, 2018 July 13,2018
Extended Camera ready: July 25, 2018 July 30,2018




PhD Contributions

Extended PhD Forum submission: July 02, 2018 July 16, 2018
Extended Notification of acceptance: July 23, 2018 July 30, 2018
Extended Camera ready: August 6, 2018 August 13, 2018